摘要 |
Some embodiments provide a method that outputs from a configurable IC a first set of data bits from a trace buffer. Each bit of the first set of data bits is simultaneously generated in the configurable circuits and, in some embodiments, multiple data bits of the first set of data bits do not reach the traced buffer simultaneously. The method also determines a set of relative delays for the first set of data bits and arranges the first set of data bits into a second set of data bits by compensating for the relative delays.
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