发明名称 MULTIPLE VIRTUAL FIFO ARRANGEMENT
摘要 The operation of a packet switch having a plurality of port circuits is enhanced by including in a port circuit a virtual FIFO for each source of data packets that the port circuit serves, such that the storage capacity of a FIFO increases and decreases as required by the associated source. A number of buffers are provided in excess of the number of port circuits. Initially each port circuit will have a buffer (601) assigned to it, buffers not assigned to port circuits forming a pool of free buffers. If the amount of data being handled by a port circuit causes the assigned buffer (601) to become full another buffer (602) from the pool is linked to the previously assigned buffer. If that buffer becomes full another buffer (603) from the pool is linked to it. As the previously assigned buffers (601,602) are emptied, by data being read out, they are reassigned to the pool until only the most recently assigned buffer (603) remains assigned to the port circuit. <IMAGE>
申请公布号 AU2856292(A) 申请公布日期 1993.06.03
申请号 AU19920028562 申请日期 1992.11.23
申请人 AMERICAN TELEPHONE AND TELEGRAPH COMPANY 发明人 DAVID R. FOLLETT;CAROL A. TOURGEE
分类号 G06F13/00;G06F5/06;H04L12/56;H04L13/08 主分类号 G06F13/00
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