| 摘要 |
PURPOSE:To provide the arithmetic circuit equipped with a rounding circuit to shorten entire arithmetic time by shortening time required for judging whether carry-up is generated or not, and shortening time required for judging whether overflow as well as underflow is generated or not. CONSTITUTION:A carry-up detection circuit 100 is equipped with a first detection circuit 101 to output a first signal when it is detected that all the bits of mantissa part data are '1' as the computed result of a computing element, and second detection circuit 102 to output a second signal showing the generation of carry-up when it is detected this first signal and a signal expressing the addition of '1' by a rounding circuit 11 are outputted together, and when the second signal is outputted, a second exponent adjusting circuit 132 adds '1' to exponent part data. |
