Ultra high voltage electrostatic discharge protection device with current gain

摘要

A semiconductor device configured to provide increased current gain comprises a semiconductor substrate having a first conductivity type. The device also comprises a first semiconductor region having a second conductivity type. The device further comprises a second semiconductor region in the first semiconductor region to having the first conductivity type. The device additionally comprises a third semiconductor region in the first semiconductor region having the second conductivity type. The device also comprises a fourth semiconductor region outside the first semiconductor region having the first conductivity type. The device further comprises a fifth semiconductor region outside the first semiconductor region adjacent the fourth semiconductor region and having the second conductivity type. The device additionally comprises a first electrode electrically connected to the third semiconductor region. The device further comprises a second electrode electrically connected to the fourth semiconductor region and to the fifth semiconductor region.

主权项

1. A semiconductor device comprising:
a semiconductor substrate having a first conductivity type; a first semiconductor region over a portion of the semiconductor substrate having the first conductivity type to a first depth relative to an upper surface of the semiconductor substrate, the first semiconductor region having a second conductivity type; a second semiconductor region in the first semiconductor region to a second depth less than the first depth relative to the upper surface, the second semiconductor region having the first conductivity type; a buried semiconductor region in the first semiconductor region adjacent the second semiconductor region, the buried semiconductor region having the first conductivity type; a third semiconductor region in the first semiconductor region to a third depth less than the first depth relative to the upper surface, the third semiconductor region having the second conductivity type; a fourth semiconductor region outside the first semiconductor region to a fourth depth relative to the upper surface, the fourth semiconductor region having the first conductivity type; a fifth semiconductor region outside the first semiconductor region to a fifth depth relative to the upper surface, the fifth semiconductor region being adjacent the fourth semiconductor region and having the second conductivity type; a first electrode electrically connected to the third semiconductor region; and a second electrode electrically connected to the fourth semiconductor region and to the fifth semiconductor region, wherein the fifth semiconductor region is configured to cause an increase in a current during a cathode to anode positive bias operation between the first electrode and the second electrode.