Fan-out PoP stacking process

摘要

Package on package structures and manners of formation are described. In an embodiment, an array of trenches is formed partially through a fan-out substrate. In an embodiment, a plurality of laterally separate locations thermal interface material is dispensed onto an array of embedded bottom die. In an embodiment a thermal compression tool including an array of cavities corresponding to an array of top packages is brought into contact with the array of top packages and underlying fan-out substrate during PoP joint formation. The fan-out substrate may be secured to a vacuum chuck during several processing operations.

主权项

1. A method of forming a semiconductor device package comprising:
forming an array of trenches partially through a fan-out substrate that includes an array of embedded bottom die such that the trenches are formed in an active side of the fan-out substrate and do not extend completely through the fan-out substrate; mounting the active side of the fan-out substrate to a temporary adhesive layer and removing a carrier substrate from the fan-out substrate; dispensing a thermal interface material onto the array of embedded bottom die at a plurality of laterally separate locations; bonding an array of top packages to a surface of the fan-out substrate opposite the active side of the fan-out substrate that is mounted to the temporary adhesive layer after forming the array of trenches partially through the fan-out substrate, wherein the array of top packages are directly over the array of embedded bottom die and the plurality of laterally separate locations of the thermal interface material; and applying an underfill material to the array of top packages, wherein the underfill material is characterized by a lower thermal conductivity than the thermal interface material, and each of the plurality of separate locations of the thermal interface material is completely laterally surrounded by the underfill material.