| 摘要 |
PURPOSE:To make it possible for the captioned circuit to be structured only with a CMOS process by dividing a signal of a higher frequency than the driving frequency of a vibrating wave motor by the application of oscillation generated by a crystal oscillator or the like, and by producing the driving signals in a digital circuit comprising only counters and a magnitude comparator. CONSTITUTION:Counters (CT) 2 and 8, and a NAND circuit 5 are reset when a reset signal is transmitted from a microcomputer (MP) 9. When the counting value of the CT2 becomes 511, the CT2 outputs a carry signal. Thus, the output signal 34 changes to be High to output the same signal as the output signal 31 to a signal line 35, which is inputted into the CT8. Now, assuming that the output value of the MC9 is 23, the input to a magnitude comparator 10 becomes equal when the CT8 becomes 23, and a rising clock is inputted into a D-flip flop (FF) 12. Hence, the outputs of the FF 13Q and 14Q become signals having the same frequency but a phase difference of 90 degree delay, which are impressed on a vibrating wave motor 23. |
