| 摘要 |
PURPOSE:To realize high speed synchronization by operating a receiver side code generator in a timing when the state of a receiver side shift register reproducing the state of a sender side code generator is in matching with the state of a fixed pattern register. CONSTITUTION:The circuit is provided with a receiver side shift register 3 monitoring and reproducing the state of a shift register of a sender side code generator 1 and with a fixed pattern register 4 latching the state of the sender side shift register as a fixed pattern at a point of time. A coincident detector 5 compares a state of the receiver side shift register 3 with a state of the fixed pattern register 4 and sends a load signal on the detection of the coincidence. Then a clock is supplied to the receiver side code generator 6 from the clock control section 7 based on the load signal and a fixed pattern is loaded from the fixed pattern register 4. Thus, high speed synchronization in the synchronization communication system with a long code series and high speed signal series is realized with simple circuit configuration. |
