| 摘要 |
PURPOSE:To control the system so that changeover is prevented when no phase synchronization is taken because a data error takes place when changeover is implemented while no synchronization is taken due to a defect of a phase synchronization circuit in the clock changeover system taking phase synchronization for a clock or the like adopting redundancy configuration. CONSTITUTION:The subject system is provided with delay circuits 2, 2' delaying outputs of clocks C, C' of an active system and a standby system, interrupt detection circuits 1,1' detecting the clock interruption of both systems, a phase synchronization monitor section 8 consisting of detection section circuits 3,3' detecting the rise of the clock and forming a pulse, of a comparator circuit 4 comparing outputs, and of a pulse detection circuit 5 detecting an output pulse of rise the comparator circuit 4, a discrimination circuit 6 discriminating whether or not the changeover is implemented and a changeover circuit 7 switching the clock. When the phase synchronization monitor section 8 discriminates it that no phase synchronization is taken, the discrimination circuit 6 is controlled for the control of the changeover circuit 7 to prevent occurrence of a data error depending on no changeover. |
