发明名称 DUBBING CONTROLLER
摘要 <p>PURPOSE:To mitigate the degradation of the driving mechanism of one side of a recording medium and to make the length of the entire recording part of the other side the same as the length of the entire recording part of the recording part of one side. CONSTITUTION:Regenerative data is delayed 9 seconds and outputted to a fade-out circuit 16 by a delay circuit 15. By a CPU 3, only when the soundless time of the intermusic of original data is short of 4 second necessary for program searching of the music in an analog tape, the fade-out circuit 16 is controlled, and thus, the fade-out circuit 16 does not allow the regenerative data after delay pass through but executes the fade-out for 5 seconds and a mute for 4 seconds.</p>
申请公布号 JPH05135494(A) 申请公布日期 1993.06.01
申请号 JP19910326348 申请日期 1991.11.14
申请人 CASIO COMPUT CO LTD 发明人 SHINGYOJI RYUJI
分类号 G11B15/02;G11B20/04 主分类号 G11B15/02
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