| 摘要 |
<p>PURPOSE:To provide a means suppressing accumulation of alignment jitter especially. CONSTITUTION:A fixed or variable delay element 6 having a delay more than a transmission delay caused in a signal processing circuit 8 is inserted to a timing extract circuit 3. Thus, the signal processing delay is set equivalently to 0 or a negative value by inserting the fixed or variable delay element 6 to the timing system thereby completely preventing the accumulation of alignment jitter. Moreover, it is not necessarily required to be set equal to the logic delay and in the case of the variable delay element 6, when the logic delay is largely changed, since the setting value of the variable delay element 6 is easily changed, the flexible system design is attained. That is, the reproduction repeater with less jitter accumulation is easily realized without changing the design parameter.</p> |
