SiGe and Si FinFET structures and methods for making the same

摘要

FinFET structures and methods for making the same. A method includes: creating a plurality of Silicon fins on a first region of a substrate, creating a plurality of Silicon-Germanium fins on a second region of the substrate, adjusting a Silicon fin pitch of the plurality of Silicon fins to a predetermined value, and adjusting a Silicon-Germanium fin pitch of the plurality of Silicon-Germanium fins to a predetermined value, where the creating steps are performed in a manner that Silicon material and Silicon-Germanium material used in making the plurality of fins will be on the semiconductor structure at a same time.

主权项

1. A method for forming a semiconductor structure comprising:
creating a plurality of Silicon fins on a first region of a substrate; creating a plurality of Silicon-Germanium fins on a second region of the substrate; adjusting a Silicon fin pitch of the plurality of Silicon fins to a predetermined value; and adjusting a Silicon-Germanium fin pitch of the plurality of Silicon-Germanium fins to a predetermined value, wherein the Silicon-Germanium fins are tall and have a high Germanium concentration wherein one of the i)Silicon fin pitch and the ii) Silicon-Germanium fin pitch is adjusted to be different from the other, wherein creating a plurality of Silicon-Germanium fin step comprises:
providing a plurality of Silicon fins on the second region of the substrate;creating spaces between the plurality of second region Silicon fins;filing the spaces between the plurality of second region Silicon fins with Silicon-Germanium; andremoving the plurality of second region Silicon fins; wherein the adjusting a Silicon fin pitch step comprises:
creating spaces between the plurality of first region Silicon fins;filing the spaces between the plurality of first region Silicon fins with Silicon-Germanium;masking both i)at least one of the plurality of first region Silicon fins and ii) the Silicon-Germanium material between the at least one masked first region Silicon fin and another unmasked first region Silicon fin; andremoving the at least one unmasked first region Silicon fin.