发明名称 MUSE DECODER
摘要 <p>PURPOSE:To decrease a high speed operating part, and to stabilize an operation by executing time division multiplex of a color difference signal alternately by a selector at every one clock, and outputting it to an output part. CONSTITUTION:A selector 5 switches alternately color difference signals R-Y, B-Y sent from interpolation filters 1, 2 by a select signal SEL, and executes its time division multiplexing. A multiplexed color difference signal C is outputted from a time base converting circuit 4 together with a luminance signal Y. This luminance signal is applied to a matrix and a gamma correcting circuit 3, and the color difference signal C is applied to an interpolation filter 6. The filter 6 shifts successively the color difference signals R-Y, B-Y by synchronizing with a clock CLK in order to return them to the original signals. In this case the selector is switched and interpolated at a prescribed timing. As a result, the number of necessary bits decreases, the circuit 4 is constituted at a low cost, and also, since a time base conversion is executed by the luminance signal Y and the color difference signal C, the signal processing can be executed by the same clock. In such a way, an operation of an MUSE decoder can be stabilized.</p>
申请公布号 JPH05137162(A) 申请公布日期 1993.06.01
申请号 JP19910297285 申请日期 1991.11.13
申请人 FUJITSU LTD;NIPPON HOSO KYOKAI <NHK> 发明人 TAKAHASHI HIDENAGA;OTOBE YUKIO;YOSHIDA MASAHIRO;KOHIYAMA KIYOYUKI;NINOMIYA YUICHI;IZUMI YOSHINORI;GOSHI SEIICHI;YAMAGUCHI KOICHI
分类号 H04N7/015;H04N7/00;H04N9/64;H04N11/08;H04N11/24 主分类号 H04N7/015
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