| 摘要 |
<p>PURPOSE:To reduce a writing time by inputting required commands into the entire memory beforehand and simultaneously writing plural memories in parallel by the commands. CONSTITUTION:IC1-ICN are FEEPROM and a DEC is an address decoder enabling the operations of the memories IC1-ICN. First, set a power supply Vpp to H. Then, designate a leading IC and set a write pulse counter to 0. Then, input write setup commands and program commands to IC1-ICN in sequence. Thus, ICs start program operations and input verifying commands to IC1-ICN. After that, output verifying data from IC1 to ICN and an output discrimination is performed. Should the discrimination is approvable, reset commands are inputted to all ICs, set Vpp = L and the process completes. Thus, the time required for a programming, i.e., a writing time is reduced.</p> |
