| 摘要 |
<p>PURPOSE:To attain high speed transferring process by halving a serial data bus while using a serial data input terminal being left unused as a serial data input/output terminal. CONSTITUTION:When mode registers MR1, MR2 are both set to '0', a data input/output terminal (terminal) SI01 is connected to the input end of a shift register 1 as an input terminal, and a terminal SI02 is connected to a serial output buffer 2 as an output terminal. When only the mode register MR2 is set to '1', the terminal SI01 and the data input end of the shift register 1 goes to unconnected state, and the terminal SI02 goes to a state connected to the data input end of the shift register 1 and the serial output buffer 2. When the mode register MR1 is set to '1', and the mode register MR2 is set to '0', the terminal SI02 and the serial output buffer 2 go to unconnected state, and the terminal SI01 goes to a state connected to the data input end of the shift register 1 and the serial output buffer 2.</p> |
