| 摘要 |
The circuit improves the efficiency of a computer system while performing LRU update process using a hardware for LRU update logic located in the LRU field of translation lookaside buffer (TLB). It includes an LRU update logic (1) for generating two types of outputs ?LRU field entry output, TLB usage/or not output (TU)? according to the signal selecting input (SE), and a TLB entry circuit (2) of which LRU field input is connected to the LRU update logic (1).
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