Apparatus and methods for phase-locked loops with temperature compensated calibration voltage

摘要

Apparatus and methods for frequency lock enhancement of phase-locked loops (PLLs) are provided. In one aspect, a PLL can include a VCO and a calibration voltage generation circuit that can generate a calibration voltage for controlling a tuning voltage input of the VCO when the VCO is being coarsely tuned. Additionally, the calibration voltage generation circuit can sense a temperature of the PLL, and can control a voltage level of the calibration voltage to provide compensation based on the sensed temperature. The calibration voltage generation circuit can include a bandgap reference circuit configured to generate a zero-to-absolute-temperature (ZTAT) current and a proportional-to-absolute temperature (PTAT) current, and the calibration voltage can be generated based in part on a difference between the PTAT current and the ZTAT current.

主权项

1. An apparatus comprising:
a phase-locked loop (PLL) having a calibration mode and an operational mode, the PLL comprising:
a voltage controlled oscillator (VCO) having a tuning voltage input, wherein an oscillation frequency of the VCO changes in relation to a voltage level of the tuning voltage input;a first variable-gain current amplifier configured to generate an amplified current based on a difference between a proportional-to-absolute temperature (PTAT) current and a zero-to-absolute-temperature (ZTAT) current, wherein an amount of amplification of the first variable-gain current amplifier is based on a first gain control signal, wherein the first gain control signal controls an amount of temperature compensation provided by a calibration voltage; and wherein the difference between the PTAT current and the ZTAT current is determined by subtracting the ZTAT current from the PTAT current;a calibration voltage generation circuit configured to generate the calibration voltage, wherein the tuning voltage input of the VCO is configured to receive the calibration voltage when the PLL is in the calibration mode,wherein the calibration voltage generation circuit is configured to sense a temperature of the PLL, and wherein the calibration voltage generation circuit is configured to control a voltage level of the calibration voltage based on the sensed temperature,wherein the calibration voltage generation circuit comprises a bandgap reference circuit configured to generate the ZTAT current and the PTAT current, wherein the calibration voltage circuit generation circuit is configured to generate the calibration voltage based in part on the difference between the PTAT current and the ZTAT current.