| 摘要 |
<p>A memory (100) has at least one decoder (116, 120) responsive to a synchronizing pulse for providing a selection signal to the memory cells (102) coincident with the partial selection signal for thereby selecting a group of memory cells for an operation. The decoder (116, 120) has a variable time delay characteristic between the synchronizing pulse and the selection signal. The pulse generator (112) has a mimicking circuit responsive to the synchronizing pulse for providing the partial selection signal to the group of memory cells. The mimicking circuit provides a time delay characteristic between the receipt of the synchronizing pulse and the partial selection signal which mimics the variable delay characteristic of the at least one decoder. <IMAGE></p> |
