发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE:To provide a semiconductor memory device such as a pseudostatic RAM or the like wherein a leak trouble between layers for a word line and a bit line or between the lines can be detected directly and with good efficiency. CONSTITUTION:The following are formed in a pseudostatic RAM or the like: test pads TW1, TW2 in which word lines W0 to Wn constituting a memory array MARY in a prescribed test operation are coupled in common sequentially and alternately; and test pads TB1, TB2 in which noninverted or inverted signal lines of complementary bit lines B0 to Bn are connected respectively in common. Thereby, a leak trouble between layers for a word line and a bit line or between the lines can be detected accurately and with good efficiency via the test pads TW1, TW2 or TB1, TB2, and the simultaneous write test of pieces of test data can be executed to a plurality of memory cells via the test pads. As a result, the detection rate of a trouble in the pseudostatic RAM or the like can be increased, the number of test processes of the RAM or the like can be reduced, and the cost of the title memory device can be promoted.
申请公布号 JPH05129547(A) 申请公布日期 1993.05.25
申请号 JP19910317553 申请日期 1991.11.05
申请人 HITACHI LTD;HITACHI VLSI ENG CORP 发明人 YOSHIDA HIROSHI;NOSAKA TOSHIO;AKIMA ISAO;KUNITO SOUICHI
分类号 H01L21/66;G11C11/401;G11C11/403;H01L27/10 主分类号 H01L21/66
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