发明名称 ARITHMETIC CIRCUIT
摘要 PURPOSE:To shorten the computing time by securing such 8 constitution of an arithmetic circuit that can work even when the data input is set up by providing a circuit which performs a static operation to a dynamic circuit of a programmable logic array PLA. CONSTITUTION:The data inputs received from an input Ain 201 and an input Bin 202 are inputted to a static exclusive OR circuit 261. The output signal 260 is set at 0 when both inputs 201 and 202 are equal to 1. If a carry occurs with this bit of 1, the signal 260 is set 0. This signal 260 is supplied to one of both ends of a NAND circuit 280 and the output signal of a CLA circuit is supplied to the other end of the circuit 280 respectively. Then the transistor of the CLA circuit conducts and is set at 0 with the input signals of the inputs 201 and 202 set equal to 1 and the CLA signal also set equal to 1. Then the circuit 280 is set at 0 and the output of this circuit is set at 1. Thus a carrier look-ahead signal is transmitted to a CLA circuit of the next stage.
申请公布号 JPH05127873(A) 申请公布日期 1993.05.25
申请号 JP19910286851 申请日期 1991.10.31
申请人 NEC CORP 发明人 YAMADA KOICHI
分类号 G06F7/00;G06F7/50;G06F7/508 主分类号 G06F7/00
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