| 摘要 |
PURPOSE:To quicken the signal transmission speed in frequency spread communication. CONSTITUTION:A PN code generating circuit 8 outputs plural PN codes PN1, PN2, PN3, PN4. A signal division circuit 5 divides a signal to be sent, e.g. a 16-bit parallel signal SO into four by 4-bits each, and converts them into serial signals and outputs the result as division signals S1, S2, S3, S4. Primary modulation circuits 11, 21, 31, 41 modulate the division signals S1, S2, S3, S4 by a conventional modulation system such as SSB, PSK, FM to output the result as primary modulation signals S1', S2', S3', S4'. Secondary modulation circuits 12, 22, 32, 42 apply frequency spread modulation to the primary modulation signals S1', S2', S3', S4' by using different PN codes PN1, PN2, PN3, PN4 respectively to output secondary modulation signals M1, M2, M3, M4. An adder circuit 3 adds the secondary modulation signals M1, M2, M3, M4 outputted from the secondary modulation circuits 12, 22, 32, 42 to give the sum to a transmission means such as an antenna. The PN code generating circuit 8 is provided with a PN code generator 6 and a delay circuit 7 delaying the generated PN code. |
