| 摘要 |
PURPOSE:To reduce the power consumption at the time of data writing and to make fast the data writing by providing a writing amplifying circuit to limit the amplitude level of an I/O line and a sense amplifying circuit to operate in response to a control signal. CONSTITUTION:At the time of data writing to a memory cell, a writing amplifying circuit W/Ai amplifies input data Di, and outputs them to complementary data lines (I/O line) DBi and DBXi. Then, the level of the data line is limited to voltage levels (Vcc-Vth and Vss+Vth) smaller than the voltage of the power line. As the result, the charging discharging current of the I/O line can be reduced and the power consumption at the time of the data writing can be reduced. By timing (operation of a control signal WC) of the data writing starting and synchronizing to a column selecting signal CL and stopping and restarting the action of a sense amplifying circuit S/Ai, the delaying of the writing time is limited. Then, the data writing can be made fast. |
