发明名称 AN ADDITIVE PROCESS FOR FINE-PITCH MULTILAYER VIAS
摘要 The process of the present invention allows inter- connecting one conductive layer to another in a Multichip Module. The process uses bumps formed by wire bonding, or any other means of forming bumps of .002"-.004" height with comparable diameter. These bumps create an opening through dielectric insulating layers, thereby allowing one conductive layer to be electrically connected to the next conductive layer.
申请公布号 CA2077720(A1) 申请公布日期 1993.05.19
申请号 CA19922077720 申请日期 1992.09.08
申请人 AG COMMUNICATION SYSTEMS CORPORATION 发明人 MCCOY, DIRK D.;JOHANSEN, SCOTT W.
分类号 H01L21/607;H01L23/522;H05K1/00;H05K1/09;H05K3/40;H05K3/46;(IPC1-7):H05K3/12 主分类号 H01L21/607
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