| 摘要 |
PURPOSE:To reduce the power consumption of a delay line for which a DRAM is used. CONSTITUTION:When a data bit is read from a memory cell 105, voltage difference generates on a digit line pair 102, 103 and a pull-down circuit 106 enlarges on the only low level side of the generated voltage difference. An output latch circuit 108 enlarges the high level side of the voltage difference after the circuit is cut off from the digit line pair 102, 103. Therefore, the high level side of the digit line pair 102, 103 maintains a VCC/2 level and power consumption is reduced. |
