| 摘要 |
PURPOSE:To reduce the number of external terminals for control signals of a test control circuit, in a semiconductor integrated logic circuit having a plurality of test circuits containing a scan path test method. CONSTITUTION:In a shift registor circuit capable of scan path constitution, an output of a flip-flop circuit 1 which does not engage with direct logic, and a scan mode control signal are subjected to logic operation via a logic element 9. Other test control circuits can be controlled by a test control signal outputted from the logic element 9. |
