发明名称 PLOTTING PROCESSOR
摘要 PURPOSE:To improve the processing speed of an entire system by canceling or shortening a waiting time by allowing plural processors connected in parallel to hold both a command packet which is being plotting processed at present and the command packet to be plotting-processed next. CONSTITUTION:When processors LP0-LP3 operate a plotting-processing, and holds the plotting command packet to be processed next, a low level weight signal WAIT* is prepared by the processors LP0-LP3, and supplied to a controller 13. The controller 13 controls an FIFO memory 12 and the processors LP0-LP3 in order to supply the next plotting command packet GCP to the processors LP0-LP3, only at the time of detecting that the WAIT* is a high level at the entire processors LP0-LP3. Then, pixel data are prepared by the processors LP0-LP3 as the result of the plotting processing, and the pixel data are outputted through terminals 14-17.
申请公布号 JPH05120438(A) 申请公布日期 1993.05.18
申请号 JP19920048019 申请日期 1992.02.04
申请人 SONY CORP 发明人 ITO KAZUMASA;KATO HIROSHI;FUJITA JUNICHI
分类号 G09G5/20;G06T11/00;G09G5/36 主分类号 G09G5/20
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