发明名称 CURRENT LIMITING CIRCUIT
摘要 PURPOSE:To limit current by clamping between the gate and the source of an output transistor at the time of overcurrent without adversely affecting the normal operation. CONSTITUTION:A resistor R1 and a transistor T3, for driving the gate of a current limiting transistor T2 having drain and source connected respectively with the gate and the source of an output transistor T1 through a delay circuit (c), are connected to an intermediate point which is connected in series with a power supply and an output terminal. According to the constitution, the output transistor T1 can be operated without lagging the turn ON time of the output transistor T1 even if there is a potential difference between VGND1 of the circuit and VGND2 of the load.
申请公布号 JPH05122839(A) 申请公布日期 1993.05.18
申请号 JP19910280255 申请日期 1991.10.28
申请人 NEC KANSAI LTD 发明人 KAWAGOE HIROKAZU
分类号 G05F1/56;H02H9/02;H02J1/00 主分类号 G05F1/56
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