| 摘要 |
<p>PURPOSE:To eliminate the constraint by a frequency by using a clock having twice as many frequencies as a desired clock frequency. CONSTITUTION:A clock inputted in a first input terminal (twice as many frequencies as a desired clock frequency) is inverted in a first inverter 2. When a 1/2 clock phase advancing control signal is inputted from a second input terminal 3, a retiming is performed by the rise edge of the output of the first inverter 2 in a retiming device 4. The clock inputted from the first input terminal 1 is frequency-divided to two by a frequency divider 5, and the output and a signal which the output was inverted by a second inverter 6 are inputted in a switching device 1. The switching device 7 switches the two inputs by the output of the retiming device 4 and outputs them. Thus a desired clock advanced by 1/2 clock phase is outputted to an output terminal 8.</p> |
