发明名称 TESTING SYSTEM FOR COMPUTER
摘要 PURPOSE:To generate the false fault of random time width in a computer device from the outside. CONSTITUTION:A diagnostic processor 101 is provided with a CNTR 118. False fault generation information is held in the PERMR 105 of the computer device 104, and its output is made effective by a fault generation instruction 113 from the diagnostic processor 101 so that a fault is generated in the computer device 104. The fault generation instruction 113 rises when a fault generation instruction FF 106 is set by the instruction of a fault generation instructing means 102, and afterward, it falls when the fault generation instruction FF 106 is reset after the CNTR 118 becomes a prescribed value. Since the value of the CNTR 118 at the time when the fault generation instruction FF 106 is set is indefinite, the false fault of the random time width can be generated.
申请公布号 JPH05120061(A) 申请公布日期 1993.05.18
申请号 JP19910282496 申请日期 1991.10.29
申请人 NEC ENG LTD 发明人 TAKAHASHI ATSUSHI
分类号 G06F11/22 主分类号 G06F11/22
代理机构 代理人
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