| 摘要 |
PURPOSE:To speed up the branch processing of a microprocessor and to especially speed up a non-conditional branch instruction including a return instruction. CONSTITUTION:A branch instruction address, a branch destination address, and a branch instruction type are made into a group and they are held in a branch instruction buffer BW102 as branch history information. A return buffer RB103 holding a return address is provided. Retrieval is executed by using a prefetch address. At the time of hit, the branch destination address of either BW102 or RB103 is selected by using the branch instruction type, and the prefetch address is switched so as to execute prebranching. An overhead at the time of branching can be made zero. A data processor can be applied to all the branch instructions including the return instruction. |
