发明名称 STATUS SYNCHRONOUS PROCESSING CIRCUIT
摘要 PURPOSE:To flexibly correspond to the difference of status signal forms and to simplify the constitution for miniaturization and cost reduction by performing processing for establishing the multi-frame synchronizing and taking out a status signal with the use of the same general data processing circuit. CONSTITUTION:A control circuit 13 judges a synchronizing status by sampling the synchronizing decision bit of the address of a memory 11. A counting/latch circuit 6 and a selection circuit 7 or the like fetch multi-frame synchronizing bits as a sample and a comparator circuit 5 or the like establishes the synchronization of multi-frame. The same general data processing circuit which is composed of the above-mentioned circuits stabilizes signals by rearranging status signals with the use of a status signal line conversion circuit 4 to be successively stored in the memory 11. Thus, the miniaturization and cost reduction can be attained by flexibly corresponding to each status signal form and simplifying the circuitry.
申请公布号 JPH05122188(A) 申请公布日期 1993.05.18
申请号 JP19910309806 申请日期 1991.10.29
申请人 NEC CORP 发明人 HAMADA TATSUYOSHI
分类号 H04J3/06;H04J3/14;H04L7/08;H04Q11/04 主分类号 H04J3/06
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