发明名称 CLOSED AREA DIGITAL WIRED COMMUNICATION SYSTEM
摘要 PURPOSE:To simplify the configuration of the circuit and to improve the transmission efficiency. CONSTITUTION:A terminal equipment 12 at a sender side is provided with a code rule violation signal addition section 15, a code rule violation (CRV) signal is added to a head of a transmission signal and the result is sent to a transmission medium 11, a terminal equipment 13 at a receiver side is provided with a code rule violation signal detection section 17, and when the detection section 17 detects a code rule violation signal, a clock fed from an oscillation section 18 is frequency-divided to reset a frequency divider section 19 generating a prescribed clock thereby establishing the synchronization between the terminal equipment 12 at the sender side and the terminal equipment 13 at the receiver side and extracting required information from each transmission information signal.
申请公布号 JPH05122210(A) 申请公布日期 1993.05.18
申请号 JP19910284752 申请日期 1991.10.30
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 SATO HIDETO
分类号 H04L7/08 主分类号 H04L7/08
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