发明名称 DECODING PREVENTING METHOD FOR STORAGE
摘要 PURPOSE:To increase the processing speed when the data are read out of a storage by sending en address signal to the storage via an address converter circuit. CONSTITUTION:When the font data are read out of a ROM 21, a CPU 30 outputs the chip selection signals to the address converting IC 33a-33e corresponding to the inputted conversion logic numbers respectively. In other words, an address converting IC having the same conversion logic as that used for the writing of the ROM 21 is selected. Meanwhile an address signal which designates the address of the ROM 21 is outputted from the CPU 30. This address signal is converted by one of IC 33a-33e selected by the chip selection signal and sent to the ROM 21. Then the address converting IC is converted into an address signal that shows the address of the ROM 21 which stores the font data to be originally corresponding to the address signal. Thus the font date to be originally corresponding to the address signal can be read out.
申请公布号 JPH05120146(A) 申请公布日期 1993.05.18
申请号 JP19910307029 申请日期 1991.10.25
申请人 MITA IND CO LTD 发明人 NAKAUE TAKAHISA
分类号 G06F12/14;G06F21/24 主分类号 G06F12/14
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