| 摘要 |
PURPOSE:To simulate faults with a small memory by a concurrent method which processes all the faults at the same time without any interruption even if a fault list overflows. CONSTITUTION:The fault simulator which performs the fault simulation of a logic circuit whose memory is limited is provided with a fault list generating means 4, a fault deleting means 5, a previous state value setting means 7, and a fault list reproducing means 8; if the fault list overflows, overflowing faults is temporarily deleted from all gates and the fault simulation is performed; and all the states of the circuit are put back to the stated before the overflowing and resimulation is performed only as to the deleted faults. |
