| 摘要 |
PURPOSE:To attain to enhance the trouble detection rate of LSI, by providing a lead wire connected to the predetermined position in an integrated circuit, a gate element for constituting the lead wire and an exclusive terminal. CONSTITUTION:A bus gate is arranged directly before a test exclusive pad (b) while the terminals BUS1, BUS3, BUSCONT1, 2 of the bus gate corresponds to the exclusive pad (b), the terminals RESET1, CLOCK1, DATA1, CLOCK2, DATA 2, CLOCK3, OUT1 to a normal pad (c) and the remainders to an internal gate region (a). When BUS1, 2 are brought to an output state and only BUS3 to an input state, the trouble detection of PART1, 3 is enabled and, when BUS1, 2 are brought to an input state and only BUS3 to an output state, CHECK of PART2 is enabled. |
