发明名称 MEMORY DEVICE
摘要 <p>PURPOSE: To increase the bit density of a memory device by performing the column decoding of two stage levels in an array section provided with extremely many columns. CONSTITUTION: This virtual ground memory is provided with an array for which memory cells (10) are arranged in rows and the columns and the plural pieces of alternately arranged first (AS0-AS32) and second (BL0-BL32) column lines. Cells in the respective columns are connected to the first column line and the second column line. A first decoder (70) selects the plural first column lines (AS1) in response to first decoded address signals and selects one (AS1) from the plural selected first column lines in response to second decoded address signals.</p>
申请公布号 JPH05114296(A) 申请公布日期 1993.05.07
申请号 JP19920026832 申请日期 1992.02.13
申请人 TEXAS INSTR INC <TI> 发明人 JIYON EFU SUKURETSUKU;FUATSUTO SHII TORUONGU
分类号 G11C11/413;G11C8/10;G11C8/12;G11C16/06;G11C16/08;G11C17/00 主分类号 G11C11/413
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