发明名称 Method for placement of circuit components in an integrated circuit
摘要 In a method for optimizing placement of circuit components on at least one integrated circuit, a list of circuit components is constructed. For each pairing of circuit components on the list, a total cost of the pairing is calculated. The total cost being calculated by first calculating the dead space resulting from the pairing, then estimating the total increase in routing area resulting from the pairing, and finally adding the dead space to the total increase in routing area to obtain the total cost. The estimation of the total increase in routing area resulting from the pairing is done by first estimating an increase in connectivity area resulting from the pairing. Then, a decrease in connectivity area resulting from the pairing is estimated. Finally, the decrease in connectivity area is subtracted from the increase in connectivity area to obtain the total increase in routing area.
申请公布号 US5208759(A) 申请公布日期 1993.05.04
申请号 US19900626816 申请日期 1990.12.13
申请人 VLSI TECHNOLOGY, INC. 发明人 WONG, DALE M.
分类号 G06F17/50 主分类号 G06F17/50
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