发明名称 INTEGRATED CIRCUIT PROVIDED WITH STATE LATCH CIRCUIT
摘要 PURPOSE:To provide the integrated circuit provided with the hardware standby mode in which high speed operation is available and the circuit is in operation with a sufficiently small power consumption. CONSTITUTION:The integrated circuit is provided with a state latch circuit comprising a capacitor 108 and a switch 107, and the charge of the capacitor 108 is kept by interrupting the switch 107 with a control signal when a main power supply is failed. The state latch circuit has CMOS circuits 102-106 and a threshold voltage of the MOS transistor(TR) being a component of the switch 107 is set higher than a threshold voltage of the MOS TR of the CMOS circuit. Since the threshold voltage of the CMOS circuits 102-106 is set to a low voltage, the high speed circuit operation is attained. On the other hand, the threshold voltage of the MOS TR of the switch element 107 is set to a high voltage, resulting in decreasing the leak current and the state latch characteristic is improved and the power consumption is reduced.
申请公布号 JPH05110392(A) 申请公布日期 1993.04.30
申请号 JP19910267432 申请日期 1991.10.16
申请人 HITACHI LTD 发明人 NISHII OSAMU;MIYAMOTO MASABUMI;HANAWA MAKOTO;TONOMURA MOTONOBU;SEKI KOICHI
分类号 H03K3/037;G11C11/407;H03K3/356;H03K19/096 主分类号 H03K3/037
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