| 摘要 |
PURPOSE:To shorten the addition processing time without increasing the scale of an accumulator circuit. CONSTITUTION:An accumulator circuit consists of an n-bit lower order accumulator 20A containing an n-bit double input adder 31 and a memory 32 which stores the addition output of the adder 31 and a higher order bit deciding circuit 20B. An n-bit digital input signal is supplied to the accumulator 20A and added to the precedent accumulated output. Thus the digital input signal is outputted as an n-bit signal. At the same time, a carry signal obtained from the adder 31 as well as an MSB are supplied to the circuit 20B among those input signals. Based on both signals, the relevant higher order bit (k) is decided (k=an integer/or above) and (n+k) bits are outputted through an accumulator circuit 20. Thus the accumulating time can be shortened even with no use of the high speed adder 31 since the carry processing relation is separated from an addition output system of lower order bits. |
