发明名称
摘要 <p>A multichip integrated circuit comprising a thin planar body (10 and 20) which has top (20b) and bottom (10b) major surfaces. Conductors, (12a) for carrying electrical signals, are integrated into the body and include input/output terminals (12) on one portion of the bottom surface. Downward-facing cavities (11-1) for holding respective high power integrated circuit chips (30) extend from another portion of the bottom surface into the body, and upward-facing cavities (21-1 through 21-6) for holding respective low power integrated circuits (30) extend from the top surface into the body. Small thermal resistance for the high power chips is achieved, and footprint is simultaneously minimized by locating the upward-facing cavities over the terminals.</p>
申请公布号 JPH0529309(B2) 申请公布日期 1993.04.30
申请号 JP19880503595 申请日期 1988.04.18
申请人 UNISYS CORP 发明人 TSUUSUTANIFUSUKII JERII IHOO
分类号 H01L23/52;H01L23/13;H01L23/538;H01L25/04;H01L25/065;H01L25/18 主分类号 H01L23/52
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