| 摘要 |
<p>PURPOSE:To realize the bit phase synchronization circuit which does not cause lacking of necessary data and double read, with regard to the bit phase synchronization circuit of a digital communication. CONSTITUTION:In the bit phase synchronization circuit consisting of a first and a second serial/parallel converting means 10, 20, a reference phase signal generating means 30, a first and a second parallel/serial converting means 40, 50, a phase monitoring pulse generating means 60, and a slip control means 70, this circuit is provided with a slip phase control means 80 for controlling a phase for executing slip control by an input data enable signal DiE. By the slip control means 70, a phase difference of a signal of a reference phase and a phase monitoring pulse is detected, whether the slip control is necessary or not is decided, and in the case the slip control is necessary, this circuit is constituted so that a bit phase synchronization is established by executing lacking/double read of data Di in a position of 'low' of the input data enable signal DiE for showing invalid data by the slip phase control means 80.</p> |
