| 摘要 |
A power is supplied to a CPU without regard to an on/off-state of a power switch. In the off-state, the CPU renders a control signal indicating that an apparatus does not accept data, to an active state or a high impedance state to inform to a host. When data is received, the state is switched to the on-state for recording operation. The received data is stored in a memory, and when the state is switched to the on-state, the data is read from the memory for recording operation. In this manner, drop of record data due to data transmission from the host in the off-state of the power switch is prevented. |
