Non-volatile semiconductor memory.

摘要

A floating gate (43) is formed via a first gate insulating film (44) over the channel region between source and drain regions (41, 42) which are formed in a semiconductor substrate (40). A control gate (45) is formed via a second gate insulating film (46) over the floating gate (43). A low impurity concentration semiconductor region (45a) is formed on the side of the control gate (45) which faces the floating gate (43). When erasing, a depletion layer (45b) is produced in this low impurity concentration region (45a) and further saturates the erase characteristic for the erasure time by decreasing the capacitance between the control gate (45) and the floating gate (43). <IMAGE>