发明名称 False-lock detection and coherent demodulation of digital date.
摘要 <p>In the method of detecting false latchings, the clock trains corresponding to two initially offset modulated signal trains are recovered, the offset between the said clock trains is noted and a false latching is detected when this offset changes sign. The method of demodulation implements this method of detecting false latchings. The device for implementing the method of detecting false latchings comprises a flip-flop (12) in series with a monostable (13). &lt;IMAGE&gt;</p>
申请公布号 EP0538737(A1) 申请公布日期 1993.04.28
申请号 EP19920117630 申请日期 1992.10.15
申请人 ALCATEL TELSPACE 发明人 PELTIER, JACQUES
分类号 H04J3/06;H04L27/00;H04L27/227;H04L27/38;H04L7/00 主分类号 H04J3/06
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