| 摘要 |
<p>A data acquisition circuit having arithmetic units (22) installed in a data bus and adapted to carry out correction such as dead-time correction and decay correction, and also having an address modification storage (12) installed in an address bus and adapted to carry out the process of changing raw data into a sinogram. As the size of memory matrices for positron ECT grows larger in recent years, software dependent on a CPU has tended to require more time for data processing and prevent image formation from taking place in real-time. The aim of the present invention is to allow data reduction and correction to be carried out in real-time.</p> |
