发明名称
摘要 PURPOSE:To prevent a time lag produced to the information which is sent back to the host side by releasing a buffer mode in case the next data is not received within a fixed time in an initial state and after reception of data from a host device. CONSTITUTION:In a buffer mode a CPU 4 fetches the data if stored in a reception buffer 5 to analize and carry out this data and also accepts an interruption. The data are stored in the buffer 5 with the interruption processing carried out at the reception of data and a signal ACK is transmitted after storage of data. While a timer 6 is restarted for each reception of data at the transmission of data. In this case, a timer interruption occurs in case the timer 6 is not restarted for a fixed time. As a result, a flag is turned off and the buffer mode is released with a non-buffer mode set instead. Thus it is possible to process the print data at high speed with use of the buffer 5 while replying immediately to various commands given from a host device 1.
申请公布号 JPH0528850(B2) 申请公布日期 1993.04.27
申请号 JP19870203733 申请日期 1987.08.17
申请人 SANYO ELECTRIC CO 发明人 SAKURAI TAKAYUKI;YAMAZAKI MASAMI
分类号 B41J2/00;B41J3/00;B41J29/38;G06F3/12;G06K15/00 主分类号 B41J2/00
代理机构 代理人
主权项
地址
您可能感兴趣的专利