发明名称 |
Data communication system |
摘要 |
A data communication system having serial data communication circuits and interrupt data communication circuits and allowing a plurality of CPUs to interchange data with each other. While a pluality of different kinds of data are interchanged by serial communication which occurs at predetermined intervals, only urgent data is interchanged by interrupt signals particular to interrupt communication. Whether or not to validate an interrupt signal (whether or not to mask an interrupt) is determined on the basis of data sent by serial data communication.
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申请公布号 |
US5206953(A) |
申请公布日期 |
1993.04.27 |
申请号 |
US19910733975 |
申请日期 |
1991.07.22 |
申请人 |
RICOH COMPANY, LTD. |
发明人 |
HASEGAWA, YUTAKA;YAMAZAKI, SYUICHI |
分类号 |
G03G15/00;G05B19/042;G06F13/24 |
主分类号 |
G03G15/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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