| 摘要 |
A timing interpolator providing high resolution timing measurement of when an event occurs. The interpolator of the present invention includes three embodiments. The interpolator of the first embodiment includes a Voltage Controlled Oscillator (VCO) phase-locked loop, an N-bit counter, and an N-bit latch. The interpolator of the second embodiment includes a delay line phase-lock loop and an X-bit latch. The delay line phase-lock loop includes an X-bit delay cell chain and a phase detector. The interpolator of the third embodiment of the present invention represents a combination of the interpolators of the first and second embodiments. The interpolator of the third embodiment includes a VCO phase-locked loop, a delay line phase-lock loop and X-bit latches.
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