发明名称 DUTY ADJUSTMENT CIRCUIT
摘要 PURPOSE:To adjust the duty ratio of a clock signal without malfunction without use of an adjustment means for offset adjustment. CONSTITUTION:A signal inputted to an input terminal 1 is inputted to a terminal 31 of a changeover switch 3 and a terminal 32 via an inverter 2, either of the terminals 31, 32 of two input terminals is selected and a terminal 33 of the changeover switch 3 outputted from the terminal 33 is connected to a reset terminal 52 of a D-FF 5 and a signal inputted to the input terminal 1 is inputted to a clock input terminal 51 of the D-FF 5 via a delay line 4 and a data input terminal 54 of the D-FF 5 and a preset terminal 55 are connected to a power supply voltage +5V and a Q output terminal 53 of the D-FF 5 is connected to an output terminal 6.
申请公布号 JPH05102806(A) 申请公布日期 1993.04.23
申请号 JP19910257428 申请日期 1991.10.04
申请人 NEC ENG LTD 发明人 KIKUCHI MAMORU
分类号 H03K5/04;H03K5/13;H03K5/14 主分类号 H03K5/04
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