| 摘要 |
PURPOSE:To provide the skew adjustment circuit in which a clock skew causing disturbance to high speed processing in a high speed LSI and compatible with a state of debugging important in the development of the LSI. CONSTITUTION:An oscillation circuit 130 is formed in the inside of an LSI. The phase of a clock inputted externally to an input terminal 191 and the phase of an output of the oscillation circuit 130 are compared by a phase comparator circuit 110 and the result of comparison is stored in a storage circuit 120. The clock from the input terminal 191 is outputted with a delay by a variable delay circuit 100 whose delay time is controlled by the storage content in the storage circuit 120 to compensate a phase fluctuation in the clock in the inside of the LSI. |
