PIN-SCAN-IN LSI LOGIC CIRCUIT AND TESTING METHOD OF SUBSTRATE MOUNTING CIRCUIT,申请号JP19910257646-传众专利搜索

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发明名称	PIN-SCAN-IN LSI LOGIC CIRCUIT AND TESTING METHOD OF SUBSTRATE MOUNTING CIRCUIT
摘要
申请公布号	JPH0599980(A)	申请公布日期	1993.04.23
申请号	JP19910257646	申请日期	1991.10.04
申请人	FUJITSU LTD	发明人	SATO TOSHIRO;YAMAMOTO KUNITOSHI;ADACHI HIROYUKI
分类号	G01R31/26;H03K19/00	主分类号	G01R31/26
代理机构		代理人
主权项
地址

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